![]() Second, I will explore error-efficiency in the context of energy harvesting internet-of-things (IoT) devices that operate on extremely constrained energy budgets. First, I will present a dedicated machine learning accelerator architecture, CNVLUTIN, that eliminates ineffectual and near ineffectual computation to improve throughput and avoid Specifcally, I will present two recent projects applying this methodology. Error-efficient design allows judicious introduction of errors at the microarchitectural level that yield answers that, while not 100% correct are acceptable for particular applications. ![]() In this talk, we explore how error-efficient architectural design can deliver higher performance for machine learning with lower energy consumption. In recent years, advances in machine learning have unlocked the tremendous promise of these applications yet they require signi cantly more compute power than a orded by modern processors. Adding to these challenges is the continued rise of computationally-intensive applications, most notably machine learning. Natalie Enright Jerger from University of Toronto.ĭreese Lab 260 (Coffee and cookies provided)Įrror-Ecient Architectures for Machine LearningĪs Moore's Law continues in the post-Dennard scaling era, architects and programmers must consider energy efficiency even more carefully as part of their designs. Join Department of Electrical and Computer Engineering for a special seminar by Prof. ![]()
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